本软件下载地址未录入,如想要软件请评论,我们会补上!verilog uart串行接收发送程序源码,作者测试通过,可供学习参考。
//calculates the clock cycle for baud rate
localparam CYCLE = CLK_FRE * 1000000 / BAUD_RATE; //一个bit需要多少时钟脉冲
//state machine code
localparam S_IDLE = 1;
localparam S_START = 2; //start bit发送起始位状态 010
localparam S_REC_BYTE = 3; //data bits发送数据状态位 011
localparam S_STOP = 4; //stop bit发送停止位状态 100
localparam S_DATA = 5; // 101